The present invention generally relates to control information backup systems, and more particularly to a control information backup system which is applicable to a system which includes a control unit and one or a plurality of independent units which are controlled by the control unit, where the control unit and the independent units are powered by different power sources.
For example, a transmission system may include a control unit and one or a plurality of independent units which are controlled by the control unit. The operation of the transmission system at the time of a power failure is guaranteed by supplying the power to the control unit and the independent units from different power sources. In such a transmission system, control information of the transmission system must not only be preserved when the power source of the independent unit fails but also when the power source of the control unit fails.
FIG. 1 shows an essential part of an example of a conventional control information backup system. In FIG. 1, an external system 100 is coupled to a transmission system 300 which includes a control unit 1 and a plurality of independent units 5.sub.1 through 5.sub.n.
The control unit 1 includes a man-machine interface (MMI) 11, an interface 12 which is coupled to the external system 100, a central processing unit (CPU) 13, a memory 14 and a non-volatile memory 15 which are coupled via a common bus 16 of the CPU 13. A bus extension circuit 17 is coupled to the common bus 16, and a power unit 18 supplies power to various parts of the control unit 1. In this example, the memory 14 includes a read only memory (ROM) and a random access memory (RAM) which store control programs to be executed by the CPU 13 and various control information. In addition, the non-volatile memory 15 is an electrically erasable programmable ROM (EEPROM).
On the other hand, the independent unit 5.sub.1 includes receivers 21 and 21' monitors 22 and 22', a selector 23, a flip-flop 24, a bus decoder 25, a tri-state buffer circuit 26, an internal control bus 28, a bus extension circuit 29, and a power unit 30.sub.1. The remaining independent units 5.sub.2 through 5.sub.n have the same construction as the independent unit 5.sub.1, and an illustration thereof will be omitted.
The control unit 1 and the independent units 5.sub.1 through 5.sub.n are coupled to each other via a control bus 19.
In the control unit 1, the CPU 13 controls the operation of the independent units 5.sub.1 through 5.sub.n based on descriptive information received from the external system 100 or the MMI 11. On the other hand, in the independent unit 5.sub.1, for example, transmission lines of a main line (channel) CH.sub.0 and a protection line (channel) CH.sub.0 ' are provided, and a line switching operation is carried out under the control of the CPU 13. The remaining independent units 5.sub.2 through 5.sub.n operate similarly to the independent unit 5.sub.1.
For example, the descriptive information from the external system 100 may include "fixed mode and specified channel" and "automatic mode and specified channel" if the transmission system 300 forms a cross-connect system which cross-connects a plurality of transmission paths In the "automatic mode" the cross-connect system automatically selects a normal channel if an abnormality is detected in a channel and an alarm is generated in this channel. On the other hand in the "fixed mode" the cross-connect system fixedly selects a channel regardless of whether or not an alarm is generated in this channel. Out of such descriptive information, the CPU 13 treats mode information such as "fixed mode" and "automatic mode" as software control information which are to be processed internally by software. On the other hand, the CPU 13 treats channel information of the "specified channel" as physical control information which is to be actually set with respect to the hardware. The CPU 13 holds the descriptive information (control information) in the memory 14 and carries out the control described below.
In other words, if the mode information stored in the memory 14 is "fixed mode" the CPU 13 controls the independent unit 5.sub.1 to select the line CH.sub.0 or CH.sub.0 ' depending on the channel information. More particularly, if the CPU 13 outputs to the common bus 16 a selection command for selecting the line CH.sub.0, the bus decoder 25 of the independent unit 5.sub.1 decodes this selection command on the control bus 28 and sets a bit data "0" on the control bus 28 into the flip-flop 24. In addition, if the CPU 13 outputs a selection command for selecting the line CH.sub.0 ', the bus decoder 25 similarly sets a bit data "1" into the flip-flop 24.
On the other hand, if the mode information stored in the memory 14 is "automatic mode" the CPU 13 first controls the independent unit 5.sub.1 to select the line CH.sub.0 or CH.sub.0 ' depending on the channel information, and then monitors the error detection of the monitor 22 or 22' so as to automatically switch the line to the normal system. In other words, the CPU 13 appropriately reads the error detection information via the buffer circuit 26 by outputting a sense command to the common bus 16, and controls the independent unit 5.sub.1 to select the line CH.sub.0 ' if an error is detected in the line CH.sub.0 and to selects the channel CH.sub.0 if an error is detected in the line CH.sub.0 '.
For example, if the power unit 30.sub.1 of the independent unit 5.sub.1 fails during the operation of the transmission system 300, the independent unit 5.sub.1 fails but the operations of the control unit 1 and the remaining independent units 5.sub.2 through 5.sub.n are not affected thereby. In addition, when the power unit 30.sub.1 recovers, the control unit 1 can restart the independent unit 5.sub.1 from the state before the failure occurred based on the control information stored in the memory 14.
On the other hand, if the power unit 18 of the control unit 1 fails during the operation of the transmission system 300, the control unit 1 fails. In this case, the independent units 5.sub.1 through 5.sub.n can continue the operations in the respective states even though no new control is made from the control unit 1. However, when the power unit 18 recovers, the control information is no longer stored in the memory 14, and for this reason, the control unit 1 cannot be recovered to the control state before the failure occurred.
Even in the above described state, the control information which is set in each hardware of the independent units 5.sub.1 through 5.sub.n from the CPU 13 can be recovered by each hardware. However, the control information (mode information or the like) which is referred internally in the CPU 13 by the software of the CPU 13 cannot be recovered. For this reason, the external descriptive information (control information) is conventionally saved in the non-volatile memory 15, so that the CPU 13 can also recover the control information which is required by the software thereof.
But the stored data within the non-volatile memory 15 may also be destroyed. Particularly in the example shown in FIG. 1 where the same power unit 18 powers the control unit 1 and the non-volatile memory 15, there is a danger that the stored data of the non-volatile memory 15 will be destroyed with the failure of the control unit 1. It is conceivable to provide an independent backup power unit exclusively for the non-volatile memory 15, however, this will result in an increased cost of the transmission system 300. Furthermore, the non-volatile memory 15 may be replaced, and when such a replacement takes place, it is conventionally necessary to reset the control information from the external system 100 or the like.